Bug 1957362 - Revert MOZ_CRASH() behavior in ASAN builds to use regular null-pointer accesses r=glandium
ASAN builds should crash the same way as regular builds when encountering a MOZ_CRASH() macro. Changing this to abort() raised a SIGILL signal instead, which caused the ASAN crash signatures to become different from regular ones in turn causing confusion in automation. Differential Revision: https://phabricator.services.mozilla.com/D243658
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@@ -241,47 +241,41 @@ MOZ_NoReturn(int aLine) {
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* MOZ_CrashSequence() executes a sequence that causes the process to crash by
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* writing the line number specified in the `aLine` parameter to the address
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* provide by `aAddress`. The store is implemented as volatile assembly code to
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* ensure it's always included in the output and always executed. This does not
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* apply to ASAN builds where we use `__builtin_trap()` instead, as an illegal
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* access would trip ASAN's checks.
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* ensure it's always included in the output and always executed.
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*/
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# if !defined(MOZ_ASAN)
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static inline void MOZ_CrashSequence(void* aAddress, intptr_t aLine) {
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# if defined(__i386__) || defined(__x86_64__)
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# if defined(__i386__) || defined(__x86_64__)
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asm volatile(
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"mov %1, (%0);\n" // Write the line number to the crashing address
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: // no output registers
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: "r"(aAddress), "r"(aLine));
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# elif defined(__arm__) || defined(__aarch64__)
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# elif defined(__arm__) || defined(__aarch64__)
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asm volatile(
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"str %1,[%0];\n" // Write the line number to the crashing address
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: // no output registers
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: "r"(aAddress), "r"(aLine));
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# elif defined(__riscv) && (__riscv_xlen == 64)
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# elif defined(__riscv) && (__riscv_xlen == 64)
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asm volatile(
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"sd %1,0(%0);\n" // Write the line number to the crashing address
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: // no output registers
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: "r"(aAddress), "r"(aLine));
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# elif defined(__sparc__) && defined(__arch64__)
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# elif defined(__sparc__) && defined(__arch64__)
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asm volatile(
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"stx %1,[%0];\n" // Write the line number to the crashing address
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: // no output registers
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: "r"(aAddress), "r"(aLine));
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# elif defined(__loongarch64)
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# elif defined(__loongarch64)
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asm volatile(
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"st.d %1,%0,0;\n" // Write the line number to the crashing address
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: // no output registers
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: "r"(aAddress), "r"(aLine));
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# else
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# warning \
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"Unsupported architecture, replace the code below with assembly suitable to crash the process"
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# else
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# warning \
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"Unsupported architecture, replace the code below with assembly suitable to crash the process"
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asm volatile("" ::: "memory");
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*((volatile int*)aAddress) = aLine; /* NOLINT */
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# endif
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}
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# else
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# define MOZ_CrashSequence(x, y) __builtin_trap()
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# endif
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}
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/*
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* MOZ_CRASH_WRITE_ADDR is the address to be used when performing a forced
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@@ -294,7 +288,7 @@ static inline void MOZ_CrashSequence(void* aAddress, intptr_t aLine) {
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* SEGV at 0x0.
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*/
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# ifdef MOZ_UBSAN
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# define MOZ_CRASH_WRITE_ADDR 0x1
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# define MOZ_CRASH_WRITE_ADDR ((void*)0x1)
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# else
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# define MOZ_CRASH_WRITE_ADDR NULL
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# endif
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